MARISA DIZONNO
ENGINEERING
SEQUENTIAL LOGIC
3.3.1 SSI Synchronous Counters
I had preivously learned about asynchronous counters in the lesson before this so this activity had to deal with the idea of eliminating the clock ripple that can cause problems in certain applications. Another name for this synchronous counter is a parallel counter. By using this synchronous counter, all of the flip-flops are clocked simultaneously, thus emliminating the clock ripple and its associated problems.
3.2.2 SSI Asynchronous Counters: 3-Bit Modulus Up Counter
This activity Iearned the fuction of the asynchronous modulus counter or in other words, a mod-counter. This counter uses the addition of simple combinational logic to a standard asynchronous counter to set the count limit and starting point. In this activity, I simulated and built a mod-5 counter that has a starting count od one. I also learned how to use a clock signal with a PLD.
0-80 Counter
This acitivty was created by my teacher to tie everything that we had been working on in class together by making a counter that starts at the number zero and goes all the way up to the number 80 and then resets itself back to zero. A counter like this, for example, could be used in a score board in a game for the time clock.